Texas A&M University-Kingsville

Topics covered:                                                       

  • Introduction to VHDL

    • Introduction to EDA tools

    • Variables ,Signals, and Constants

    • Entity and architectures

    • Operators

    • Flow control

    • Attributes

    • Functions and procedures

    • Packages and libraries

    • Arrays

    • File I/O

    • Generics

    • Generate statements

  • Hazards

  • VHDL test benches

  • Networks for arithmetic operations

    • Serial adder

    • Parallel ripple adder/subtracter

    • Carry select and carry look ahead

    • Multiplier and divider

    • Register design

  • Programmable logic devices

    • PLA

    • PAL

    • CPLD

    • FPGA

  • Synthesis and design procedure for CPLD and FPGA devices

  • VHDL Synthesis

  • State machine

    • SM chart

    • ROM realization

    • PAL realization

    • VHDL and state encoding techniques

  • Reduction of state tables

    • Equivalent states

    • Equivalent sequential networks

  • Asynchronous Networks

Click here  for Course schedule & Lab Resources

This page was last updated on: November 18, 2012